====== V-7 980T Dynamic Tests ======
----

===== NOTES (Bob's README) =====
----
  * Infrastructure summary: 
    * Virtex-II Pro -based XRTC Gen-2 motherboard;
    * Virtex-7 980T "light" DUT daughter board. 
  * Below there are the FuncMon (Virtex-II Pro) and DUT (Virtex-7 980T) designs used in **TAMU 2017.03** testing.
  * CMT and LVCMOS18 DUT designs were developed by Eric; all others by Bob.


\\
===== MMCM/PLL tests =====
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CMT; DUT (V7980T) Vivado design.\\
{{infrastructure:test-designs:v7-980:cmt-mar-02-2017.zip | v7-980:cmt-mar-02-2017.zip}}

DCM; FuncMon (V-II-Pro) ISE design.\\
{{infrastructure:test-designs:v7-980:funcmon_v2p_dcm_test_980t_2017_03_01.zip | funcmon_v2p_dcm_test_980t_2017_03_01.zip}}

\\
===== IOB tests, Parking Lot/Backup Files =====
----

Bob Kent's googleDrive Backup (probably latest are identical to what's broken out and organized in the sections below):\\
  * {{ infrastructure:test-designs:v7-980:Davis_test_2017_Jan_Feb.zip | zip file for Jan2017 UCDavis proton test designs & docs (39 MB)}}
  * {{ infrastructure:test-designs:v7-980:Design_directories_TAMU_March_2017.zip | zip file with Design Directories for Mar2017 TAMU test (94 MB) }}
  * {{ infrastructure:test-designs:v7-980:Final_design_directories_March_2017.zip | zip file with later Design Directories for Mar 2017 TAMU heavy ion test (54 MB) }}
  * {{ infrastructure:test-designs:v7-980:Tamu_test_March_08_2017.zip | zip file for Mar2017 TAMU heavy ion test designs & docs (7 MB)}}

===== IOB LVCMOS (1V8) std. tests =====
----

Bob's notes (verbatim from .txt files):\\
  * [[ infrastructure:test-designs:v7-980:lvcmos18_157_regs_map_registered | lvcmos18_157_regs_map_registered.txt ]]
  * [[ infrastructure:test-designs:v7-980:lvcmos18_157_regs_map_unregistered | lvcmos18_157_regs_map_unregistered.txt ]]
  * [[ infrastructure:test-designs:v7-980:lvcmos18_four_screens_157_regs | lvcmos18_four_screens_157_regs.txt ]]

DUT (V7980T) Vivado design.\\
{{infrastructure:test-designs:v7-980:iob-lvcmos-mar-07-2017.zip | iob-lvcmos-mar-07-2017.zip}}

Registered test; FuncMon (V-II-Pro) ISE design.\\
{{infrastructure:test-designs:v7-980:funcmon_v2p_lvcmos18_registered_980t_2017_03_08_b_inverted_clk_inc.zip | funcmon_v2p_lvcmos18_registered_980t_2017_03_08_b_inverted_clk_inc.zip}}

Un-registered test; FuncMon (V-II-Pro) ISE design.\\
{{infrastructure:test-designs:v7-980:funcmon_v2p_lvcmos18_unregistered_980t_2017_03_08_a.zip | funcmon_v2p_lvcmos18_unregistered_980t_2017_03_08_a.zip}}


\\
===== IOB LVDS std. tests =====
----

Bob's notes (verbatim from .txt files):
  * [[ infrastructure:test-designs:v7-980:lvds_72_regs_map | lvds_72_regs_map.txt ]]
  * [[ infrastructure:test-designs:v7-980:lvds_72_regs_map_updated | lvds_72_regs_map_updated.txt ]]
  * [[ infrastructure:test-designs:v7-980:lvds_two_screens_72_regs | lvds_two_screens_72_regs.txt ]]

Registered test; DUT (V7980T) Vivado design.\\
{{infrastructure:test-designs:v7-980:vivado_dut_lvds_registered_980t_2017_03_08.zip | vivado_dut_lvds_registered_980t_2017_03_08.zip}}

Un-registered test; DUT (V7980T) Vivado design.\\
{{infrastructure:test-designs:v7-980:vivado_dut_lvds_unregistered_980t_2017_03_05.zip | vivado_dut_lvds_unregistered_980t_2017_03_05.zip}}

Both registered/un-registered tests; FuncMon (V-II-Pro) ISE design.\\ 
{{infrastructure:test-designs:v7-980:funcmon_v2p_lvds_reg_unreg_980t_2017_03_09_iob_regs_diff_clk_inverted.zip | funcmon_v2p_lvds_reg_unreg_980t_2017_03_09_iob_regs_diff_clk_inverted.zip}}


\\
===== IOB MaxIO (LVCMOS 1V8 & LVDS stds.) tests =====
----

Bob's notes (verbatim from .txt files):
  * [[ infrastructure:test-designs:v7-980:max_io_128_regs_map | max_io_128_regs_map.txt ]]
  * [[ infrastructure:test-designs:v7-980:max_io_128_regs_map_updated | max_io_128_regs_map_updated.txt ]]
  * [[ infrastructure:test-designs:v7-980:max_io_two_screens | max_io_two_screens.txt ]]

DUT (V7980T) Vivado design.\\
{{infrastructure:test-designs:v7-980:vivado_dut_980t_max_connected_io_2017_02_21_tmv_fix_b.zip | vivado_dut_980t_max_connected_io_2017_02_21_tmv_fix_b.zip}}

FuncMon (V-II-Pro) ISE design.\\ 
{{infrastructure:test-designs:v7-980:funcmon_v2p_v7_maximum_io_2017_03_08_two_screens_hi_16bits.zip | funcmon_v2p_v7_maximum_io_2017_03_08_two_screens_hi_16bits.zip}}


\\
===== IOSERDES (ISERDES/OSERDES) tests =====
----

Bob's notes (verbatim from .txt files):
  * [[ infrastructure:test-designs:v7-980:ioserdes_56_regs_map | ioserdes_56_regs_map.txt ]]
  * [[ infrastructure:test-designs:v7-980:ioserdes_two_screens_56_regs | ioserdes_two_screens_56_regs.txt]]

DUT (V7980T) Vivado design.\\
{{infrastructure:test-designs:v7-980:vivado_dut_ioserdes_2017_03_02_use_six_clocks_all_banks_global_reset_tmv_bus_09.zip | vivado_dut_ioserdes_2017_03_02_use_six_clocks_all_banks_global_reset_tmv_bus_09.zip}}

FuncMon (V-II-Pro) ISE design.\\ 
{{infrastructure:test-designs:v7-980:funcmon_v2p_ioserdes_980t_2017_03_10_56_regs_clks6_screens2_send_two_resets.zip | funcmon_v2p_ioserdes_980t_2017_03_10_56_regs_clks6_screens2_send_two_resets.zip}}


\\
===== IOB HSTL std. tests =====
----

(To be uploaded). \\
**NOTE: The HSTL tests that went into the beam were developed by Raytheon.**  



\\
===== BRAM/BRAM-ECC tests =====
----

**NOTE: The BRAM tests that went into the beam were developed by Raytheon.**  

DUT (V7980T) \\
 -- Vivado design files, except implementation folders:\\
{{ infrastructure:test-designs:v7-980:project_bram.zip | project_bram.zip}}\\
 -- Vivado design folder, complete with implementation folders (~250MB, external link):\\
{{ http://www.swiftradiation.com/XRTCcache/v7designs/project_bram.tgz | project_bram.tgz}}

FuncMon (V-II-Pro) ISE design.\\ 
{{infrastructure:test-designs:v7-980:file.zip | TBD}}




